An FPGA implementation of dirty paper precoder

Pankaj Bhagawat; Weihuang Wang; Momin Uppal; Gwan Choi; Zixiang Xiong; Mark Yeary; Alan Harris

doi:10.1109/ICC.2007.459

An FPGA implementation of dirty paper precoder

Pankaj Bhagawat, Weihuang Wang, Momin Uppal, Gwan Choi, Zixiang Xiong, Mark Yeary, Alan Harris

School of Engineering

Research output: Chapter or Contribution to Book › Literary contribution

Original language	English
Title of host publication	2007 IEEE International Conference on Communications, ICC'07
Pages	2761-2766
Number of pages	6
DOIs	https://doi.org/10.1109/ICC.2007.459
State	Published - 2007
Event	2007 IEEE International Conference on Communications, ICC'07 - Glasgow, Scotland, United Kingdom Duration: Jun 24 2007 → Jun 28 2007

Publication series

Name	IEEE International Conference on Communications
ISSN (Print)	0536-1486

Conference

Conference	2007 IEEE International Conference on Communications, ICC'07
Country/Territory	United Kingdom
City	Glasgow, Scotland
Period	6/24/07 → 6/28/07

ASJC Scopus Subject Areas

Computer Networks and Communications
Electrical and Electronic Engineering

Keywords

Dirty paper codes
Hardware architectures
Nested trellis
Pre-coding

Access to Document

10.1109/ICC.2007.459

Cite this

Bhagawat, P, Wang, W, Uppal, M, Choi, G, Xiong, Z, Yeary, M & Harris, A 2007, An FPGA implementation of dirty paper precoder. in 2007 IEEE International Conference on Communications, ICC'07., 4289130, IEEE International Conference on Communications, pp. 2761-2766, 2007 IEEE International Conference on Communications, ICC'07, Glasgow, Scotland, United Kingdom, 6/24/07. https://doi.org/10.1109/ICC.2007.459

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author = "Pankaj Bhagawat and Weihuang Wang and Momin Uppal and Gwan Choi and Zixiang Xiong and Mark Yeary and Alan Harris",

year = "2007",

doi = "10.1109/ICC.2007.459",

language = "English",

isbn = "1424403537",

series = "IEEE International Conference on Communications",

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AU - Bhagawat, Pankaj

AU - Wang, Weihuang

AU - Uppal, Momin

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AU - Xiong, Zixiang

AU - Yeary, Mark

AU - Harris, Alan

PY - 2007

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KW - Dirty paper codes

KW - Hardware architectures

KW - Nested trellis

KW - Pre-coding

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DO - 10.1109/ICC.2007.459

M3 - Literary contribution

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SN - 1424403537

SN - 9781424403530

T3 - IEEE International Conference on Communications

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BT - 2007 IEEE International Conference on Communications, ICC'07

T2 - 2007 IEEE International Conference on Communications, ICC'07

Y2 - 24 June 2007 through 28 June 2007

ER -

An FPGA implementation of dirty paper precoder

Publication series

Conference

ASJC Scopus Subject Areas

Keywords

Access to Document

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Cite this